1. Field of the Invention
The present invention relates to a packaging method and packaging structure of semiconductor devices such as bare chip with bump formed thereon or chip size package and in particular, a packaging method and packaging structure of semiconductor devices having a resin sealing packaging structure permitting an ease of rework.
2. Description of the Related Art
A flip chip packaging method having a publicly-known solder bump is shown in FIG. 11(a) to FIG. 11(d). As shown in FIGS. 11(a)-(d), there has been carried out a method comprising the steps of preparing a semiconductor device (LSI chip) 6 after the formation of a bump 5 and a wiring substrate 1 with a solder 2 formed thereon (FIG. 11(a)); aligning and mounting the semiconductor device 6 on the substrate 1 (FIG. 11(b)) after sticking a flux 9 to the bump tip of the semiconductor device 6 or the substrate 1; accomplishing the reflow, washing the flux (FIG. 11(c)), then filling an under resin 4xe2x80x2 into a gap between the semiconductor device 6 and the substrate 1 by dint of capillarity as shown in FIG. 11(d) and finally curing a resin.
Besides, FIGS. 12(a) and 12(b) show a conventional process using no flux. After coating a thermosetting resin of flux action (hereinafter, referred to as active resin 10) onto a print substrate 1 having a pad 7 coated with solder 2, as shown in FIG. 12(a), the semiconductor device (LSI chip) 6 after the formation of a bump 5 on a pad 8 is aligned and mounted on the print substrate 1 and thereafter reflow is accomplished as shown in FIG. 12(b), thereby enabling the soldering connection without use of a flux.
Similarly, used as a flip chip packaging method using a gold bump is a method comprising the filling of an under-fill resin after mounting an LSI chip onto a wiring substrate and heat pressuring to electrically connecting the LSI and the wiring substrate via a bump or a packaging method comprising mounting an LSI chip and heat pressuring to cure a resin after coating the resin onto a substrate.
A first problem in a conventional packaging structure and method is that even when the rework of detaching the LSI chip once packaged to a substrate from the substrate and replacing it with a new LSI chip becomes necessary, it is not easy to surely remove the LSI chip fixed by use of a resin and further lead the surface of the chip-mounted substrate to a re-packageable state without the sealing resin left. This is because the sealing resin mainly composed of an epoxy resin is so designed as to lay stress to the assurance of reliability and accordingly the resin itself is so hard, the strength of adhesion to the substrate is so strong that the substrate often ends in being broken when an attempt is made to remove the LSI.
Besides, even if the LSI could be removed without the substrate is broken, the resin left on the substrate surface is firmly stuck and a large elastic modulus, hardness or the like and a mechanical strength due to the influence of a filler added usually on the order of 50-60% or the like makes it difficult to clean the resin off the substrate without damaging the surface thereof.
Thus, with respect to a problem of rework, a sealing resin reputed to be reworkable has been proposed. Concerning the adhesiveness to a substrate under operating environments of below 125xc2x0 C., this resin has such an adhesion strength as capable of securing the reliability and at operating temperatures of 200xc2x0 C. or higher as LSI removal temperatures, the adhesion to a substrate lowers and this resin becomes a resin of being LSI removable without breakage of the substrate. In case of this resin, however, compatibility between reliability and reworkability can hardly be obtained. For example, if the filling amount of a filler is lowered so as to facilitate the cleaning of the resin left on a substrate, the thermal expansion coefficient increases simultaneously, and the thermal stress in stretching and contracting a gap between the LSI and the substrate by a heat cycle increases, so that a similar thermal stress is given also to a solder bump, thus lowering the reliability. From these, it is considered not easy to obtain a sealing resin jointly provided with both reliability and reworkability enough for practical use.
Besides, in a conventional flip chip packaging method for connecting a bump by using a flux, there is a tendency to lower the bump height and narrow the gap between the LSI chip and the substrate especially with narrowing pitch due to a higher densitization of LSI, washing of a flux falls into more and more difficult circumstances than a conventional method, and consequently the flux residue becomes at issue still more. As a problem caused by the flux residue, when an active agent remains in electronic parts such as LSI after the flow and this remaining active agent absorbs moisture, its ionic component lowers the electric insulation, thereby causing a problem of deteriorating the reliability of an electronic part produced by migration or the like. In addition to causing a problem of reliability, the filling of under-fill is also hindered, thus causing another problem of lowering the yield of a built-up product such as LSI.
With respect to the problem of a flux residue, use of an active resin has been proposed as a method for the flip chip packaging without use of a flux as shown in FIG. 12(a) and FIG. 12(b). In the above method, however, not only having an active action necessary for the solder joining is required, but involving of air in the area enclosed with a bump is likely to occur and a void is easily generated in case of an LSI having many bumps. Besides, in executing the reflow, an exact control of the package process is demanded for a positional deviation of the LSI caused by buoyancy based on a resin or the like if the quantity of the resin is great. Accordingly, an exact control of resin characteristics such as viscosity is demanded and compatibility between flux actions (removal of a solder oxide film) and physical properties is not easy. Namely, in addition to reliability and reworkability, a further wide exact control is demanded for active actions, viscosity and the like and development of a resin satisfying all these is still more difficult.
On the other hand, various attempts have been proposed to make the reworkability and the reliability compatible. For example, Japanese Patent No. 2924830 specification discloses an arrangement of filling a thermoplastic resin and a thermosetting resin between a semiconductor device and a circuit substrate and at that time, disposing and filling the thermoplastic resin near the center of the gap formed by the semiconductor device and the circuit substrate to join them and sealing the surrounding of the thermoplastic resin with the thermosetting resin to accomplish the resin sealing. If semiconductor devices are inspected prior to the thermosetting resin sealing and revealed to be faulty, heating is made to higher temperatures than the melting point of the thermoplastic resin to remove a faulty semiconductor device and after the whole product become good, a thermosetting resin is filled for sealing and cured to seal the product with a resin. Besides, Japanese Patent No. 2564728 discloses a case of combining resins different in curing conditions such as a photosetting resin and thermosetting resin, a photosetting resin and a spontaneous curing resin or a thermosetting resin and a spontaneous curing resin as the sealing resin. After temporarily fastening a substrate and semiconductor devices under curing conditions of either resin, semiconductor devices are inspected, and a faulty semiconductor is peeled off by soaking the product with a solvent for dissolving the organic resin if found or if the product is good, the other resin is formally cured to complete the resin sealing.
Even for any method, however, an inspection is made in a state of temporary fastening and the rework is possible in this state, but after the formal curing, the rework is difficult as is conventional. Besides, a highly reliable resin sealing is stated to be possible in either example, but in case of Japanese Patent No. 2924830 specification, since two resins different in characteristics are in contact with both a substrate and semiconductor devices, a heat cycle comprising a repetition of heating during the operation of a semiconductor device and cooling during the pause brings about a stress applied to its boundary, based on a difference of both resins in thermal expansion coefficient and there is a fear of badly affecting the semiconductor or the wires on the substrate and damaging the reliability. In case of using a photosetting resin for the other Japanese Patent No. 2564728, only an optically transparent material such as glass substrate is used as the substrate. With a spontaneous curing resin, considerable time is taken till the curing and the production yield lowers.
In a semiconductor device such as bare chip with a bump formed thereon or chip-size package, it is an object of the present invention to provide a packaging structure and a packaging method reworkable even after the formal curing and good in connection reliability.
A semiconductor device packaging structure comprises an electric connection made via bumps between the electrode of a semiconductor device and that of a wiring substrate and a stacked formation in a gap between the above semiconductor device and the above wiring substrate of a first resin decreasing in mechanical strength under given conditions and becoming reworkable and a second resin capable of moderating the stress due to a difference in thermal expansion coefficient between the semiconductor device and the wiring substrate and better in mechanical strength than the first resin under the given conditions and is characterized in that the first resin is formed at a thickness of less than a half of the above gap in total on the surface of at least either of the semiconductor device and the wiring substrate.
A semiconductor device packaging method according to the present invention comprises the steps of: coating a first resin decreasing in mechanical strength and becoming reworkable under given conditions at a thickness of less than a half of the above gap in total onto at least either one of the surface of a wiring substrate surface on which a semiconductor device is mounted and the surface of the semiconductor device at a thickness of less than a half of the above gap in total on the surface of at least either of the semiconductor device and the wiring substrate, then mounting the semiconductor device with bumps formed to electrically connect the electrode of the semiconductor device and that of the wiring substrate via bumps, thirdly filling a second thermosetting resin capable of moderating the stress due to a difference in thermal expansion coefficient between the semiconductor device and the wiring substrate into the gap between the semiconductor device and the wiring substrate to at least either one of which the first resin is coated and thereafter curing the resin.
Another semiconductor device packaging method according to the present invention comprises the steps of: coating a first resin decreasing in mechanical strength and becoming reworkable under given conditions and moreover a solder oxide film removal action (hereinafter, referred to as flux action) to the surface of a semiconductor device and mounting a solder ball, then performing the reflow and mounting bumps to the semiconductor device, further coating the first resin or a resin having a different action from that of the first resin to tips of solder bumps, mounting the semiconductor device onto the wiring substrate and electrically connecting the electrode of the semiconductor device and the electrode of the wiring substrate, thereafter filling a second resin.
Still another embodiment of semiconductor device packaging method in accordance with the present invention, for the electric connection made via bumps between the electrode of a semiconductor device and that of a wiring substrate and the gap resin-sealed between the above semiconductor device and the above wiring substrate, comprising: a step of scraping a second resin stuck to at least the tip section of the above bumps to expose a bump material quality after the curing of a second resin coated at a thickness of at least half the bump height to the surface of the semiconductor device with a bump formed and capable of moderating the stress due to a difference in thermal expansion coefficient between the semiconductor device and the wiring substrate; a step of coating a first resin deteriorating in mechanical strength under a given condition to the above wiring substrate; a step of mounting and heating the semiconductor device after the alignment of the bump thereof with the electrode of the above wiring substrate to electrically connect the semiconductor device to the electrode of the wiring substrate and a step of curing the first resin.
The first effect is to easily executing the rework of the semiconductor device.
This is because the selective removal of the semiconductor device from the first resin layer becomes possible and the resin remaining on the substrate decreases and accordingly the substrate cleaning after the removal of a chip becomes easy.
The second effect is to make the reworkability and the connection reliability easily compatible.
This is because use of a resin with its reworkability taken into account as the first resin layer permits the second resin occupying the majority of the resin sealing layer to be selected with stress laid on the connection reliability without consideration of reworkability.
Besides, in the case of using an active resin of flux property as the first resin for the solder connection, the flux cleaning step can be simplified, the equipment investment can be reduced and the package built-up cost can be saved in comparison with a conventional packaging method using a flux. Furthermore, a bad influence on reliability can be prevented which originates in the flux residue coming from poor washing.
Moreover, with a method of coating and forming the second resin a bump-formed semiconductor device prior to mounting the semiconductor device on a wiring substrate, uniform coating and curing of the second resin on the bump-formed surface of the semiconductor device makes a layer of the second resin of a stable thickness formable and further polishing and uniformizing the bump tips enables the dispersion in bump height to be prevented and at the same time the second resin stuck to the bump tips to be removed, so that a stable connection is performable at the time of mounting. Furthermore, since the first resin is necessarily formed in a uniform gap between the second resin and the substrate at the time of mounting, a stacking resin structure can be implemented stably and surely which allows the reworkability and the connection reliability to be compatible. Furthermore, since the second resin is uniformly formed prior to the mounting of the semiconductor device, the unevenness of the surface depending on the presence of bumps is extremely slight and therefore the void generated on account of a residual hollow derived from the bump unevenness at the time of mounting can be prevented.